10 nm lithography process - WikiChip

文章推薦指數: 80 %
投票人數:10人

This allows for a full node shrink, enabling a 2X increase in logic density compared to their 16nm process. The 10FF process will have 15% ... Semiconductor&ComputerEngineering  WikiChip  WikiChip WikiChip Home RandomArticle RecentChanges C



請為這篇文章評分?